The present invention relates generally to testing and, in one embodiment, more particularly to integrated circuit testing.
It is desirable to check the integrity of the bus interfaces of an integrated circuit to verify that there are no open circuits, short circuits, or other failures that would impede bus communication with the integrated circuit. It is desirable to perform this verification function both in the manufacturing environment and in the field. This verification should discover open or shorted board traces as well as damage to pins of the integrated circuit.
Boundary scan testing is the industry standard for integrated circuit verification and can readily accommodate bus integrity verification along with testing of internal circuitry of the integrated circuit. Boundary scanning, however, requires highly expensive and specialized equipment that interfaces with scanning functionality built into the integrated circuit. Thus, it is infeasible to verify bus integrity in this way once the integrated circuit has left the manufacturing environment.
What is needed are systems and methods for verifying bus integrity of an integrated circuit that reduce the need for specialized test equipment.